gsoc2012 cpuidle project introduction

Blog post by yongcong on Fri, 2012-04-27 16:04

My gsoc2012 project is adding cpuidle support to haiku. As we all know, transistor power consumption is composed of dynamic and static ones. The former is due to charge/discharge of capacitance and other switching activity; the later is due to leakage and bias current. In the following section, I'd like to simply abstract power saving technology in nowadays cpu; powering saving technology in nowadays OS; what's missing in haiku, IOW the reason why I want to work on it.

Power saving technology in CPU
Dynamic Frequency and Voltage Scaling
Change core frequency and the corresponding supply voltage on the fly. This technology can reduce both reduce the dynamic and static power consumption.

clock gating
stop clock distribution. This technology can reduce dynamic power consumption

power gating
With the improvement of manufacturing process, transistor feature size reduced significantly. Smaller transis